Delta RMC151 - Manual (Page 523)

6 Communication
Registers within a consistent block are all updated at the same time. Notice that the
Response Block area is divided into two consistent blocks. Therefore, the first eight (8)
registers may have been updated at a different time than the last eight (8)
registers. This is important because command and read/write synchronization use the
first register, and therefore only the following seven (7) registers are guaranteed to have
been updated at the same time as this synchronization register.
For example, suppose a PLC issues a command to axis 1 and then needs to wait for it to
get in position. To do this, the PLC must issue the command, wait for the command to be
received, and finally check the axis's In Position status bit. However, if the Axis 1 Status
Bits register is placed in the second block of registers, then even after the Command
Acknowledge bit matches the Command Request bit, indicating that the command
was received, we have no way of knowing whether the Axis 1 Status Bits register was
read from the controller before or after the command was issued, and thus could provide
the In Position bit from before the command was issued.
In short, do not put any registers that depend on a command being issued—such as axis
Status Bits, Error Bits, or Command Position—or the Read Response—which is tightly
coupled to the Read/Write Acknowledge bit in register 0—in the second block of
registers.
Configuring the Data
Setting up the Indirect Data Map
The Response Block continuously returns the values from the RMC70 Indirect Data
registers 0-15. These registers, in turn, can be mapped to any registers in the RMC70.
Thereby, the values from the selected registers in the RMC70 can be read from and
written to by writing to and reading from the Indirect Data registers.
To set up the Indirect Data Map:
1. Open the Indirect Data Map Editor.
2. In the Register column of the first Indirect Data Map entry, type "%MD8.0" and press
Enter. This will map Axis 0 Status Bits register to the first item in the Indirect Data
Map. Basic mode requires that the first item in the Indirect Data Map contains the Axis
0 Status Bits register.
3. For each of the remaining Indirect Data Map entries 1-15, enter the desired register to
map to each. To do this, click the cell in the Register column, click the ellipsis button
( ), then browse to the desired register.
Note:
Response Block registers 8-15 are not consistent with registers 0-7. Because of this,
registers 8-15 should not be used for tight synchronization with registers 0-7. The
following registers should not be placed in Indirect Data Map registers 8 to 15:
- Read Response - this is tightly coupled with the Read/Write Acknowledge bit in
register 0.
- Status and Error bits, Actual Position, Command Position - these depend on the
command being issued.
4. If you wish to add additional read capability, one of the Indirect Data Map registers
should be mapped to the Read Response register. Then, the corresponding register in
the Response Block will return the value of a read from any single register in the
RMC70 at any time. See Read from the RMC70 below.
Registers within a consistent block are all updated at the same time. Notice that the
Response Block area is divided into two consistent blocks. Therefore, the first eight (8)
registers may have been updated at a different time than the last eight (8)
registers. This is important because command and read/write synchronization use the
first register, and therefore only the following seven (7) registers are guaranteed to have
been updated at the same time as this synchronization register.
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