Renesas SH7781 - Manual (Page 944)

19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 914 of 1658
REJ09B0261-0100
19.3.47 Plane n Memory Length Register (PnMLR) (n = 1 to 6)
The plane n memory length registers (PnMLR, n = 1 to 6) set the memory length (Y-direction
memory area) for plane n.
R/W:
Internal update:
R/W:
Internal update:
16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30 Bit:
Initial value:
R/W R R R R R R R R R R R R R R R
O
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PnMLY — — — — — — — — — — — — — — —
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
O O O O O O O O O O O O O O O O
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PnMLY
0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14 Bit:
Initial value:
Bit Bit Name
Initial
Value R/W Internal
Update Description
31 to 17
⎯ All
0 R
⎯ Reserved
These bits are always read as 0. The write value
should always be 0.
16 to 0 PnMLY 0 R/W Yes Plane n Memory Length Y
The memory length (Y-direction memory area)
for plane n should be set in raster line units.
When the display exceeds this area, the display
data becomes the data for BPOR.
When the setting is 0, the area is handled as an
infinite area, and so the display data is never the
background color register data.