Renesas SH7781 - Manual (Page 832)

18. Timer Unit (TMU)
Rev.1.00 Jan. 10, 2008 Page 802 of 1658
REJ09B0261-0100
18.3 Register Descriptions
Tables 18.2 and 18.3 show the TMU register configuration.
Table 18.2 Register Configuration (1)
Channel Register Name Abbrev. R/W P4 Address Area 7 Address Size
Sync
Clock
Common
to 0, 1, 2 Timer start register 0 TSTR0 R/W H'FFD8 0004 H'1FD8 0004 8 Pck
Timer constant register 0 TCOR0 R/W H'FFD8 0008 H'1FD8 0008 32 Pck
Timer counter 0 TCNT0 R/W H'FFD8 000C H'1FD8 000C 32 Pck
0
Timer control register 0 TCR0 R/W H'FFD8 0010 H'1FD8 0010 16 Pck
Timer constant register 1 TCOR1 R/W H'FFD8 0014 H'1FD8 0014 32 Pck
Timer counter 1 TCNT1 R/W H'FFD8 0018 H'1FD8 0018 32 Pck
1
Timer control register 1 TCR1 R/W H'FFD8 001C H'1FD8 001C 16 Pck
Timer constant register 2 TCOR2 R/W H'FFD8 0020 H'1FD8 0020 32 Pck
Timer counter 2 TCNT2 R/W H'FFD8 0024 H'1FD8 0024 32 Pck
Timer control register 2 TCR2 R/W H'FFD8 0028 H'1FD8 0028 16 Pck
2
Input capture register 2 TCPR2 R H'FFD8 002C H'1FD8 002C 32 Pck
Common
to 3, 4, 5 Timer start register 1 TSTR1 R/W H'FFDC 0004 H'1FDC 0004 8 Pck
Timer constant register 3 TCOR3 R/W H'FFDC 0008 H'1FDC 0008 32 Pck
Timer counter 3 TCNT3 R/W H'FFDC 000C H'1FDC 000C 32 Pck
3
Timer control register 3 TCR3 R/W H'FFDC 0010 H'1FDC 0010 16 Pck
Timer constant register 4 TCOR4 R/W H'FFDC 0014 H'1FDC 0014 32 Pck
Timer counter 4 TCNT4 R/W H'FFDC 0018 H'1FDC 0018 32 Pck
4
Timer control register 4 TCR4 R/W H'FFDC 001C H'1FDC 001C 16 Pck
5 Timer constant register 5 TCOR5 R/W H'FFDC 0020 H'1FDC 0020 32 Pck
Timer counter 5 TCNT5 R/W H'FFDC 0024 H'1FDC 0024 32 Pck
Timer control register 5 TCR5 R/W H'FFDC 0028 H'1FDC 0028 16 Pck