Renesas SH7781 User Manual
Page 320
10. Interrupt Controller (INTC)
Rev.1.00 Jan. 10, 2008 Page 290 of 1658
REJ09B0261-0100
Bit Name
Initial
Value R/W Description
2
IM102
0
R/W
Masks the interrupt source
of
IRL7 to IRL4 = HHLH
(H'D).
1
IM101
0
R/W
Masks the interrupt source
of
IRL7 to IRL4 = HHHL
(H'E).
[When read]
0: The interrupt is
accepted.
1: The interrupt is
masked.
[When written]
0: No effect
1: Masks the interrupt
0 —
0 R
Reserved
This bit is always read as 0. The write value should
always be 0.
See also other documents in the category Renesas Hardware:
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- M16C FAMILY (103 pages)
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- 4513 (210 pages)
- M34551E8FP (16 pages)
- Dummy IC M3T-SSOP36B-450 (4 pages)
- Emulation Pod M30100T3-RPD-E (52 pages)
- Converter Board for M30102 M30102T-PTC (4 pages)
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- H8/3814 Series (21 pages)
- H8S/2646 Series (20 pages)
- SuperHTM Family SH7125 Series (40 pages)
- M30262T-PTC (4 pages)
- SH7670 (82 pages)
- H8/3864 Series (20 pages)
- Emulator System M3T-MR100 (306 pages)
- 38K0 (6 pages)
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