Renesas SH7781 - Manual (Page 364)

10. Interrupt Controller (INTC)
Rev.1.00 Jan. 10, 2008 Page 334 of 1658
REJ09B0261-0100
Interrupt Source
INTEVT
Code
Interrupt
Priority
Mask/Clear
Register & Bit
Interrupt
Source
Register
Detail
Source
Register
Priority
within
Sets of
Sources
Default
Priority
SCIF-ch2 ERI2* INT2B1[8] High
RXI2*
H'980 INT2PRI2
[12:8]
INT2MSKR[4]
INT2MSKCLR[4]
INT2A0[4]
INT2A1[4]
INT2B1[9]
BRI2* INT2B1[10]
TXI2* INT2B1[11]
SCIF-ch3 ERI3* INT2B1[12]
RXI3*
H'9A0 INT2PRI2
[4:0]
INT2MSKR[5]
INT2MSKCLR[5]
INT2A0[5]
INT2A1[5]
INT2B1[12]
BRI3* INT2B1[14]
TXI3* INT2B1[15]
SCIF-ch4 ERI4* INT2B1[16]
RXI4*
H'9C0 INT2PRI3
[28:24]
INT2MSKR[6]
INT2MSKCLR[6]
INT2A0[6]
INT2A1[6]
INT2B1[17]
BRI4* INT2B1[18]
TXI4* INT2B1[19]
SCIF-ch5 ERI5* INT2B1[20]
RXI5*
H'9E0 INT2PRI2
[20:16]
INT2MSKR[7]
INT2MSKCLR[7]
INT2A0[7]
INT2A1[7]
INT2B1[21]
BRI5* INT2B1[22]
TXI5* INT2B1[23]
PCIC(0) PCISERR H'A00 INT2PRI5
[12:8]
INT2MSKR[14]
INT2MSKCLR
[14]
INT2A0[14]
INT2A1[14]
INT2B3[0]
PCIC(1) PCIINTA H'A20 INT2PRI5
[4:0]
INT2MSKR[15]
INT2MSKCLR
[15]
INT2A0[15]
INT2A1[15]
INT2B3[1]
PCIC(2) PCIINTB H'A40 INT2PRI6
[28:24]
INT2MSKR[16]
INT2MSKCLR
[16]
INT2A0[16]
INT2A1[16]
INT2B3[2]
PCIC(3) PCIINTC H'A60 INT2PRI6
[20:16]
INT2MSKR[17]
INT2MSKCLR
[17]
INT2A0[17]
INT2A1[17]
INT2B3[3]
PCIC(4) PCIINTD H'A80 INT2PRI6
[12:8]
INT2MSKR[18]
INT2MSKCLR
[18]
INT2A0[18]
INT2A1[18]
INT2B3[4]
Low