Renesas SH7781 - Manual (Page 656)

13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 626 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
Value R/W
Description
31 to 5
⎯
All 0 SH: R
PCI: —
Reserved
These bits are always read as 0. The write value
should always be 0.
4 to 2 RANGE All 0 SH: R/W
PCI: —
Address Range to be Compared
These bits specify the address range of PCICSAR1 to
be compared.
000: Compared with PCICSAR1.CADR[31:12] (4 kbytes)
001: Compared with PCICSAR1.CADR[31:16] (64 kbytes)
010: Compared with PCICSAR1.CADR[31:20] (1 Mbyte)
011: Compared with PCICSAR1.CADR[31:24] (16 Mbytes)
100: Compared with PCICSAR1.CADR[31:25] (32 Mbytes)
101: Compared with PCICSAR1.CADR[31:26] (64 Mbytes)
110: Compared with PCICSAR1.CADR[31:27] (128 Mbytes)
111: Compared with PCICSAR1.CADR[31:28] (256 Mbytes)
Valid only when PCICSCR1.SNPMD = 10 or 11.
1, 0 SNPMD All 0 SH: R/W
PCI: —
Snoop Mode for PCICSAR1
These bits specify whether PCICSAR1 is compared
with the SuperHyway bus address requested by an
external device, or not. When PCICSAR1 is specified
to be compared, a condition to issue snoop
commands can be specified.
00: PCICSAR1 not compared
01: Reserved (setting prohibited)
10: PCICSAR1 is compared. If the address matches
PCICSAR1 in the range, snoop commands are
not issued. If not, snoop commands are issued.
11: PCICSAR1 is compared. If the address matches
PCICSAR1 in the range, snoop commands are
issued. If not, snoop commands are not issued.