Renesas SH7781 - Manual (Page 845)

18. Timer Unit (TMU)
Rev.1.00 Jan. 10, 2008 Page 815 of 1658
REJ09B0261-0100
18.6 Usage Notes
18.6.1 Register Writes
When writing to a TMU register, timer count operation must be stopped by clearing the start bit
(STR5 to STR0) for the relevant channel in TSTR.
Note that TSTR can be written to, and the UNF and ICPF bits in TCR can be cleared while the
count is in progress. When the flags (UNF and ICPF) are cleared while the count is in progress,
make sure not to change the values of bits other than those being cleared.
18.6.2 Reading from TCNT
Reading from TCNT is performed synchronously with the timer count operation. Note that when
the timer count operation is performed simultaneously with reading from a register, the
synchronous processing causes the TCNT value before the count-down operation to be read as the
TCNT value.
18.6.3 External Clock Frequency
Ensure that the external clock (TCLK) input frequency for channels 0, 1 and 2 does not exceed
Pck/4.