Renesas SH7781 - Manual (Page 419)

11. Local Bus State Controller (LBSC)
Rev.1.00 Jan. 10, 2008 Page 389 of 1658
REJ09B0261-0100
Table 11.7 64-Bit External Device/Big Endian Access and Data Alignment (2)
Operation Strobe Signal
Access
Size Address
No.
WE7 WE6 WE5 WE4 WE3 WE2 WE1 WE0
8n 1 Asserted
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8n + 1 1 ⎯ Asserted ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8n + 2 1 ⎯ ⎯ Asserted ⎯ ⎯ ⎯ ⎯ ⎯
8n
+ 3
1
⎯ ⎯ ⎯ Asserted ⎯ ⎯ ⎯ ⎯
8n
+ 4
1
⎯ ⎯ ⎯ ⎯ Asserted ⎯ ⎯ ⎯
8n
+ 5
1
⎯ ⎯ ⎯ ⎯ ⎯ Asserted ⎯ ⎯
8n
+ 6
1
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Asserted ⎯
Byte
8n
+ 7
1
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Asserted
8n 1 Asserted Asserted ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8n + 2 1 ⎯ ⎯ Asserted Asserted ⎯ ⎯ ⎯ ⎯
8n
+ 4
1
⎯ ⎯ ⎯ ⎯ Asserted Asserted ⎯ ⎯
Word
8n
+ 6
1
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Asserted
Asserted
8n 1 Asserted Asserted Asserted Asserted
⎯ ⎯ ⎯ ⎯
Longword
8n
+ 4
1
⎯ ⎯ ⎯ ⎯ Asserted Asserted
Asserted Asserted
32 Bytes* 8n 1 Asserted Asserted Asserted Asserted Asserted Asserted Asserted Asserted
8n + 8 2 Asserted Asserted Asserted Asserted Asserted Asserted Asserted Asserted
8n + 16 3 Asserted Asserted Asserted Asserted Asserted Asserted Asserted Asserted
8n
+ 24 4
Asserted Asserted Asserted Asserted Asserted Asserted Asserted Asserted
Note: * This table shows an example when the access start address is on the 32-byte
boundary. When the start address is not on the 32-byte boundary, accesses are
performed up to immediately before the 32-byte boundary and the address is wrapped
around to the previous 32-byte boundary.