beautypg.com

31 port q data register (pqdr) – Renesas SH7781 User Manual

Page 1462

background image

28. General Purpose I/O Ports (GPIO)

Rev.1.00 Jan. 10, 2008 Page 1432 of 1658
REJ09B0261-0100

28.2.31

Port Q Data Register (PQDR)

PQDR is an 8-bit readable/writable register that stores port Q data.

0

1

2

3

4

5

6

7

0

0

0

0

0

0

0

0

PQ0DT

PQ1DT

PQ2DT

PQ3DT

PQ4DT

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Bit:

Initial value:

R/W:

Bit Bit

Name

Initial
value R/W Description

7 to 5

⎯ All

0

R/W

Reserved

These bits are always read as 0, and the write value
should always be 0.

4 PQ4DT

0* R/W

3 PQ3DT

0* R/W

2 PQ2DT

0* R/W

1 PQ1DT

0* R/W

0 PQ0DT

0* R/W

These bits store output data of a pin which is used as a
general-purpose output port. When the pin functions as
a general-purpose output port, reading the port will read
out the value of the corresponding bit of this register.

When the pin functions as a general-purpose input port,
reading the port will read out the status of the
corresponding pin.

Note: * When the bus mode is set to the local bus or DU via the bus mode pins (MODE11 and

MODE12), the pin is initially used as a general-purpose input, and the pin status is read
from this register.