Renesas SH7781 User Manual
Page 1669
Appendix
Rev.1.00 Jan. 10, 2008 Page 1639 of 1658
REJ09B0261-0100
Reset
Pin Name
(LSI level)
Pin Name
(Module level)
Related
Module I/O
Power
-on Manual Sleep
Module
Standby
Bus
Release
Port H3 (default) GPIO
I/O
PI
K
K
⎯
K
SCIF0_RTS SCIF I/O
⎯
I K
K K
HSPI_CS HSPI
I/O
⎯
Z K K K
SCIF0_RTS/
HSPI_CS/
FSE
FSE FLCTL
O
⎯
O K K k
Port H1 (default) GPIO
I/O
PI
K
K
⎯
K
SCIF0_RXD SCIF I
⎯
I I K I
SCIF0_RXD/
HSPI_RX/
FRB
HSPI_RX HSPI
I
⎯
I K
K K
FRB
FLCTL
I
⎯
I K
K K
Port H2 (default) GPIO
I/O
PI
K
K
⎯
K
SCIF0_SCK SCIF I/O
⎯
I K
K K
HSPI_CLK HSPI
I/O
⎯
Z K K K
SCIF0_SCK/
HSPI_CLK/
FRE
FRE FLCTL
O
⎯
O K K K
Port H0 (default) GPIO
I/O
PI
K
K
⎯
K
SCIF0_TXD SCIF O
⎯
Z O
K O
HSPI_TX HSPI
O
⎯
Z K K K
SCIF0_TXD/
HSPI_TX/
FWE
FWE FLCTL
O
⎯
O K K K
Port H6 (default) GPIO
I/O
PI
K
K
⎯
K
SCIF1_RXD
SCIF1_RXD SCIF I
⎯
I I I I
Port H7 (default) GPIO
I/O
PI
K
K
⎯
K
SCIF1_SCK
SCIF1_SCK SCIF I/O
⎯
I K
K K
Port H5 (default) GPIO
I/O
PI
Z K
⎯
K
SCIF1_TXD
SCIF1_TXD SCIF O
⎯
K O
K O
SCIF2_RXD
(default)
SCIF I PI
I K
K K
SCIF2_RXD/
SIOF_RXD
SIOF_RXD SIOF
I
⎯
I I I I
Port J3 (default) GPIO
I/O
PI
K
K
⎯
K
SIOF_MCLK/
HAC_RES
SIOF_MCLK SIOF I
⎯
I I I I
HAC_RES HAC O
⎯
O O O O