Renesas SH7781 - Manual (Page 453)

11. Local Bus State Controller (LBSC)
Rev.1.00 Jan. 10, 2008 Page 423 of 1658
REJ09B0261-0100
(2) I/O Card Interface Timing
Figures 11.19 and 11.20 show the timing for the PCMCIA I/O card interface.
When a PCMCIA card is accessed as the I/O card interface, dynamic sizing with the I/O bus width
can be performed using the
IOIS16 pin. With the 16-bit bus width selected, if the IOIS16 signal is
high during the word-size I/O bus cycle, the I/O port is recognized as eight bits in bus width. In
this case, a data access for only eight bits is performed in the I/O bus cycle being executed, and
this is automatically followed by a data access for the remaining eight bits. Dynamic bus sizing is
also performed for byte-size access to address 2n
+ 1.
Figure 11.21 shows the basic timing for dynamic bus sizing.