Renesas SH7781 - Manual (Page 789)

16. Watchdog Timer and Reset (WDT)
Rev.1.00 Jan. 10, 2008 Page 759 of 1658
REJ09B0261-0100
Section 16 Watchdog Timer and Reset (WDT)
The watchdog timer and reset module (WDT) comprises a reset control unit and a watchdog timer
control unit, and controls the power-on reset sequence and internal reset of the LSI.
The WDT is a single-channel timer that can be used either as a watchdog timer or interval timer.
16.1 Features
• The watchdog timer unit monitors for system runaway using a timer counting at regular time
intervals.
• Two operating modes:
⎯ In watchdog timer mode, internal reset of the chip is initiated on counter overflow and on-
chip modules are reset.
⎯ In interval timer mode, an interrupt is generated on counter overflow.
• Selectable between power-on reset and manual reset. When manual reset is selected, a manual
reset signal is output from the
MRESETOUT pin.
• In order to prevent accidental writing to the WDT-related registers, writing to them is only
possible when a certain code is set in the uppermost eight bits in the data for writing.