Renesas SH7781 - Manual (Page 479)

11. Local Bus State Controller (LBSC)
Rev.1.00 Jan. 10, 2008 Page 449 of 1658
REJ09B0261-0100
Asserted for 2 cycles or more
Master-mode device access
CLKOUT
BREQ
BACK
A25 to A0
CSn
R/ W
RD
WEn
D31 to D0
(write)
BREQ
BACK
BS
A25 to A0
CSn
R/ W
RD
WEn
BS
D31 to D0
(write)
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Negated within 2 cycles
Must be asserted
for 2 cycles or more
Must be negated
within 2 cycles
Slave-mode device access
Master access Slave access Master access
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Figure 11.42 Arbitration Sequence