Renesas SH7781 - Manual (Page 1169)

22. Serial I/O with FIFO (SIOF)
Rev.1.00 Jan. 10, 2008 Page 1139 of 1658
REJ09B0261-0100
22.4.7 Transmit and Receive Procedures
Set each register after setting the PFC.
(1) Transmission in Master Mode
Figure 22.9 shows an example of settings and operation for master mode transmission.
Start
End
Set the SCKE bit in SICTR to 1
Start SIOF_SCK output
Set SITDR
Set the TXE bit in SICTR to 0
Transmit SITDR from SIOF_TXD
synchronously with SIOF_SYNC
TDREQ = 1
Transfer ended?
No
Yes
No
Yes
No.
1
2
3
4
5
6
7
8
Flowchart SIOF Settings SIOF Operation
Set operation start for baud rate generator
Output serial clock
Set transmit data
Set to disable transmission End transmission
Set the start for frame synchronous signal
output and enable transmission
Output frame
synchronous signal and
issue transmit transfer
request*
Transmit
Note: * When interrupts due to transmit data underflow are enabled, after setting the no. 6 transmit data, the TXE bit should be set to 1.
Set SIMDR, SISCR, SITDAR,
SIRDAR, SICDAR, SITCR,
and SIFCTR
Set the FSE and TXE bits in SICTR to 1
Set operating mode, serial clock, slot
positions for transmit/receive data, slot
position for control data, and FIFO
request threshold value
Figure 22.9 Example of Transmit Operation in Master Mode