Renesas SH7781 - Manual (Page 608)

13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 578 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
Value R/W
Description
19 to 4 MBA2 H'0000 SH: R
PCI: R
Memory Space 1 Base Address (lower 16 bits)
These bits are fixed to H'0000 by hardware.
3 LAP 0 SH: R
PCI: R
Prefetch Control
Indicates whether prefetch can be performed in local
address space 1.
0: Prefetch disabled
1: Prefetch enabled (not supported)
2, 1 LAT 00 SH: R
PCI: R
Memory Type
These bits indicate the memory type of local address
space 1.
00: Base address can be set to 32-bit width and 32-bit
space
01: Reserved
10: Base address is set to 64-bit width (Not
supported)
11: Reserved
0 ASI 0 SH: R
PCI: R
Address Space Indicator
Indicates whether the base address indicated by this
register is in the I/O or memory space.
0: Memory space
1: I/O space