Renesas SH7781 - Manual (Page 703)

14. Direct Memory Access Controller (DMAC)
Rev.1.00 Jan. 10, 2008 Page 673 of 1658
REJ09B0261-0100
Channel Name Abbrev.
Power-on
Reset
by PRESET
Pin/WDT/
H-UDI
Manual
Reset
by
WDT/Multiple
Exception
Sleep
by SLEEP
instruction
Deep Sleep
by SLEEP
instruction
(DSLP = 1)
Module
Standby
8 DMA source address register 8 SAR8 Undefined Undefined Retained Retained Retained
DMA destination address register 8 DAR8 Undefined Undefined Retained Retained Retained
DMA transfer count register 8 TCR8 Undefined Undefined Retained Retained Retained
DMA channel control register 8 CHCR8 H'4000 0000 H'4000 0000 Retained Retained Retained
9 DMA source address register 9 SAR9 Undefined Undefined Retained Retained Retained
DMA destination address register 9 DAR9 Undefined Undefined Retained Retained Retained
DMA transfer count register 9 TCR9 Undefined Undefined Retained Retained Retained
DMA channel control register 9 CHCR9 H'4000 0000 H'4000 0000 Retained Retained Retained
6 to 11 DMA operation register 1 DMAOR1 H'0000 H'0000 Retained Retained Retained
10 DMA source address register 10 SAR10 Undefined Undefined Retained Retained Retained
DMA destination address register 10 DAR10 Undefined Undefined Retained Retained Retained
DMA transfer count register 10 TCR10 Undefined Undefined Retained Retained Retained
DMA channel control register 10 CHCR10 H'4000 0000 H'4000 0000 Retained Retained Retained
11 DMA source address register 11 SAR11 Undefined Undefined Retained Retained Retained
DMA destination address register 11 DAR11 Undefined Undefined Retained Retained Retained
DMA transfer count register 11 TCR11 Undefined Undefined Retained Retained Retained
DMA channel control register 11 CHCR11 H'4000 0000 H'4000 0000 Retained Retained Retained
6 DMA source address register B6 SARB6 Undefined Undefined Retained Retained Retained
DMA destination address register
B6
DARB6 Undefined Undefined Retained Retained Retained
DMA transfer count register B6 TCRB6 Undefined Undefined Retained Retained Retained
7 DMA source address register B7 SARB7 Undefined Undefined Retained Retained Retained
DMA destination address register
B7
DARB7 Undefined Undefined Retained Retained Retained
DMA transfer count register B7 TCRB7 Undefined Undefined Retained Retained Retained
8 DMA source address register B8 SARB8 Undefined Undefined Retained Retained Retained
DMA destination address register
B8
DARB8 Undefined Undefined Retained Retained Retained
DMA transfer count register B8 TCRB8 Undefined Undefined Retained Retained Retained