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Renesas SH7781 User Manual

Page 315

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10. Interrupt Controller (INTC)

Rev.1.00 Jan. 10, 2008 Page 285 of 1658

REJ09B0261-0100

Bit Name

Initial
Value R/W Description

26

IM05 1 R/W

Sets

masking

of

individual

pin interrupt source on
IRQ5.

25

IM06 1 R/W

Sets

masking

of

individual

pin interrupt source on
IRQ6.

24

IM07 1 R/W

Sets

masking

of

individual

pin interrupt source on
IRQ7.

[When read]

0: The interrupts are

accepted.

1: The interrupts are

masked.

[When written]

0: No effect

1: Masks the interrupt

23 to 0

All 0

R

Reserved

These bits are always read as 0. The write value
should always be 0.

See also other documents in the category Renesas Hardware: