Renesas SH7781 - Manual (Page 635)

13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 605 of 1658
REJ09B0261-0100
(8) PCI Error Address Information Register (PCIAIR)
This register records PCI address information when an error is detected.
The value of this register is undefined until an interrupt is detected. Regardless of the information
on mask registers, etc, the value is retained when an interrupt is detected.
SH R/W:
PCI R/W:
SH R/W:
PCI R/W:
16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30 Bit:
Initial value:
R R R R R R R R R R R R R R R R
R R R R R R R R R R R R R R R R
x x x x x x x x x
AIR
x x x x x x x
R R R R R R R R R R R R R R R R
R R R R R R R R R R R R R R R R
x x x x x x x x x
AIR
x x x x x x x
0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14 Bit:
Initial value:
Bit Bit Name
Initial
Value R/W Description
31 to 0 AIR H'xxxx xxxx SH: R
PCI: R
Address Log
This register retains PCI address information (the
states of the AD[31:0] line) when an error occurs.