Renesas SH7781 - Manual (Page 1680)

Appendix
Rev.1.00 Jan. 10, 2008 Page 1650 of 1658
REJ09B0261-0100
Pin Name (LSI level)
Pin Name
(Module level)
Module I/O When Not in Use
Port H2 (default) GPIO I/O
SCIF0_SCK SCIF I/O
HSPI_CLK HSPI I/O
SCIF0_SCK/
HSPI_CLK/
FRE
FRE FLCTL
O
Open
Port H0 (default) GPIO I/O
SCIF0_TXD SCIF O
HSPI_TX HSPI O
SCIF0_TXD/
HSPI_TX/
FWE
FWE FLCTL
O
Open
Port H6 (default) GPIO I/O SCIF1_RXD
SCIF1_RXD SCIF I
Open
Port H7 (default) GPIO I/O SCIF1_SCK
SCIF1_SCK SCIF I/O
Open
Port H5 (default) GPIO I/O SCIF1_TXD
SCIF1_TXD SCIF O
Open
SCIF2_RXD (default) SCIF I SCIF2_RXD/
SIOF_RXD
SIOF_RXD SIOF I
Open
Port J3 (default) GPIO I/O
SIOF_MCLK SIOF I
SIOF_MCLK/
HAC_RES
HAC_RES HAC
O
Open
Port J5 (default) GPIO I/O
SIOF_RXD SIOF I
HAC0_SDIN HAC I
SIOF_RXD/
HAC0_SDIN/
SSI0_SCK
SSI0_SCK SSI I/O
Open
Port J2 (default) GPIO I/O
SIOF_SCK SIOF I/O
HAC0_BITCLK HAC I
SIOF_SCK/
HAC0_BITCLK/
SSI0_CLK
SSI0_CLK SSI I
Open
Port J4 (default) GPIO I/O
SIOF_SYNC SIOF I/O
SIOF_SYNC/
HAC0_SYNC/
SSI0_WS
HAC0_SYNC HAC O
Open
SSI0_WS SSI I/O