Renesas SH7781 - Manual (Page 1502)

29. User Break Controller (UBC)
Rev.1.00 Jan. 10, 2008 Page 1472 of 1658
REJ09B0261-0100
29.2.9 Break Control Register (CBCR)
CBCR is a readable/writable 32-bit register which specifies whether or not to use the user break
debugging support function. For details on the user break debugging support function, refer to
section 29.4, User Break Debugging Support Function.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
UBDE
R R R R R R R R R R R R R R R R
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R R R R R R R R R R R R R R R R/W
Bit :
Initial value :
R/W:
Bit :
Initial value :
R/W:
Bit Bit Name
Initial
Value R/W
Description
31 to 1 — All 0 R Reserved
For read/write in this bit, refer to General Precautions on
Handling of Product.
0 UBDE 0 R/W User Break Debugging Support Function Enable
Specifies whether or not to use the user break debugging
support function.
0: Does not use the user break debugging support
function.
1: Uses the user break debugging support function.