Renesas SH7781 - Manual (Page 488)

12. DDR2-SDRAM Interface (DBSC2)
Rev.1.00 Jan. 10, 2008 Page 458 of 1658
REJ09B0261-0100
⎯ DDR2-SDRAM data bus width: 16 bits
• One 256 Mbits (16M × 16 bits) connected in parallel (total capacity = 256 Mbits)
• Two 256 Mbits (32M × 8 bits) connected in parallel (total capacity = 512 Mbits)
• One 512 Mbits (32M × 16 bits) connected in parallel (total capacity = 512 Mbits)
• Two 512 Mbits (64M × 8 bits) connected in parallel (total capacity = 1 Gbit)
• One 1 Gbit (64M × 16 bits) connected in parallel (total capacity = 1 Gbit)
• Two 1 Gbit (128M × 8 bits) connected in parallel (total capacity = 2 Gbits)
• One 2 Gbits (128M × 16 bits) connected in parallel (total capacity = 2 Gbits)
• Two 2 Gbits (256M × 8 bits) connected in parallel (total capacity = 4 Gbits)