Renesas SH7781 - Manual (Page 542)

12. DDR2-SDRAM Interface (DBSC2)
Rev.1.00 Jan. 10, 2008 Page 512 of 1658
REJ09B0261-0100
12.5 DBSC2 Operation
12.5.1 Supported SDRAM Commands
Table 12.11 lists the SDRAM commands issued by the DBSC2. These commands are issued to the
DDR2-SDRAM in synchronously with MCK0,
MCK0, MCK1, and MCK1. In the table, n-1
indicates the state of the signal applied to DDR2-SDRAM one cycle before SDRAM command
issue; n indicates the state of the signal at the time of command issue.
Table 12.11 SDRAM Commands Issued by the DBSC2
MCKE
Function Symbol n-1 n
MCS MRAS MCAS MWE
MA
[14:11] MA10/
AP MBA
[2:0] MA
[9:0]
Device
deslect DSEL H H H X X X X X X X
Read READ H H L H L H V L V V
Write WRITE H H L H L L V L V V
Bank activate ACT H H L L H H V V V V
Precharge
select bank PRE H H L L H L X L V X
Precharge all
banks PALL H H L L H L X H X X
Auto-
refresh REF H H L L L H X X X X
Self-
refresh entry
from IDLE SLFRSH H L L L L H X X X X
Self-
refresh exit SLFRSHX L H H X X X X X X X
Mode register
set MRS/
EMRS H H L L L L V V V V
Legend:
H: High level
L: Low level
X: High or low level (don't care)
V: Valid data
The above DSEL command is issued when DDR2-SDRAM is not accessed, and so need not be
explicitly issued by the user.