Renesas SH7781 - Manual (Page 283)

9. On-Chip Memory
Rev.1.00 Jan. 10, 2008 Page 253 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
Value R/W
Description
5 to 0 L0DSZ Undefined R/W OL memory Page 0 Block Transfer Destination Address
Select
When MMUCR.AT = 0 or RAMCR.RP = 0, these bits
select whether the operand addresses or L0DADR
values are used as bits 15 to 10 of the transfer
destination physical address for block transfer to page
0A or 0B in the OL memory. L0DSZ bits [5:0]
correspond to the transfer destination physical address
bits [15:10].
0: The operand address is used as the transfer
destination physical address.
1: The L0DADR value is used as the transfer
destination physical address.
Settable values:
111111: Transfer destination physical address is
specified in 1-Kbyte units.
111110: Transfer destination physical address is
specified in 2-Kbyte units.
111100: Transfer destination physical address is
specified in 4-Kbyte units.
111000: Transfer destination physical address is
specified in 8-Kbyte units.
110000: Transfer destination physical address is
specified in 16-Kbyte units.
100000: Transfer destination physical address is
specified in 32-Kbyte units.
000000: Transfer destination physical address is
specified in 64-Kbyte units.
Settings other than the ones given above are
prohibited.