Renesas SH7781 - Manual (Page 625)

13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 595 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
Value R/W
Description
28 to 20 LSR 0 0000
0000 SH: R/W
PCI: R
Capacity of Local Address Spaces 1 (9 bits)
These bits specify the size of the local address space
1 (address space for this LSI internal bus) in byte
units.
(Specified size (Mbytes)
− 1) should be set to these
bits. When all bits are set to 0, 1-Mbyte space is
secured (initial value).
B'0 0000 0000: 1 Mbyte
B'0 0000 0001: 2 Mbytes
B'0 0000 0011: 4 Mbytes
B'0 0000 0111: 8 Mbytes
B'0 0000 1111: 16 Mbytes
B'0 0001 1111: 32 Mbytes
B'0 0011 1111: 64 Mbytes
B'0 0111 1111: 128 Mbytes
B'0 1111 1111: 256 Mbytes
B'1 1111 1111: 512 Mbytes
Other than above: Setting prohibited
19 to 1
⎯
All 0 SH: R
PCI: R
Reserved
These bits are always read as 0. The write value
should always be 0.
0 MBARE 0 SH: R/W
PCI: R
PCI Memory Base Address Register 1 Enable
Enables accesses to the local address space 1 by
setting this bit to 1.
0: MBAR1 disabled
1: MBAR1 enabled