Renesas SH7781 - Manual (Page 1041)

20. Graphics Data Translation Accelerator (GDTA)
Rev.1.00 Jan. 10, 2008 Page 1011 of 1658
REJ09B0261-0100
20.3.33 MC Future Frame Y Pointer Register (MCFYPR)
MCFYPR is in the MC register block and specifies the Y pointer address for a future frame.
16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC_FYPT
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
BIt:
Initial value:
R/W:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC_FYPT
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
BIt:
Initial value:
R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 0 MC_FYPT All 0 R/W Future Frame Y Pointer
The address should be set. 0 should be written to bits 3
to 0.
Note: A 16-byte boundary address must be specified.
20.3.34 MC Future Frame U Pointer Register (MCFUPR)
MCFUPR is in the MC register block and specifies an address to set the U pointer for a future
frame.
16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC_FUPT
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
BIt:
Initial value:
R/W:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC_FUPT
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
BIt:
Initial value:
R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 0 MC_FUPT All 0 R/W Future Frame U Pointer
The address should be set. 0 should be written to bits 2
to 0.
Note: An 8-byte boundary address must be specified.