Renesas SH7781 - Manual (Page 1452)

28. General Purpose I/O Ports (GPIO)
Rev.1.00 Jan. 10, 2008 Page 1422 of 1658
REJ09B0261-0100
28.2.21 Port E Data Register (PEDR)
PEDR is an 8-bit readable/writable register that stores port E data.
0 1 2 3 4 5 6 7
x 0 0 x 0 0 0
PE0DT PE1DT PE2DT PE3DT PE4DT PE5DT — —
0
R/W R/W R/W R/W R/W R/W R/W R/W
Bit:
Initial value:
R/W:
Bit Bit Name
Initial
value R/W Description
7 and 6
⎯ All
0 R/W Reserved
These bits are always read as 0, and the write value
should always be 0.
5 PE5DT 0* R/W
4 PE4DT 0* R/W
3 PE3DT Pin input R/W
2 PE2DT 0* R/W
1 PE1DT 0* R/W
0 PE0DT Pin input R/W
These bits store output data of a pin which is used as a
general-purpose output port. When the pin functions as
a general-purpose output port, reading the port will read
out the value of the corresponding bit of this register.
When the pin functions as a general-purpose input port,
reading the port will read out the status of the
corresponding pin.
Note: * When the bus mode is set to the local bus or DU via the bus mode pins (MODE11 and
MODE12), the pin is initially used as a general-purpose input, and the pin status is read
from this register.