Renesas SH7781 - Manual (Page 1030)

20. Graphics Data Translation Accelerator (GDTA)
Rev.1.00 Jan. 10, 2008 Page 1000 of 1658
REJ09B0261-0100
20.3.21 MC Command FIFO (MCCF)
MCCF is in the MC register block and receives commands. This register uses the FIFO method
and recognizes a maximum of eight command parameters according to the writing order. This
register does not retain the written values. This register is always read as 0.
16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC_CF
W W W W W W W W W W W W W W W W
BIt:
Initial value:
R/W:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
MC_CF
W W W W W W W W W W W W W W W W
BIt:
Initial value:
R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 0 MC_CF 0 W Command FIFO Register
Setting Method: When accessing this register, the MC_EN bit in GACER should be set to 1.
Access is possible only when the MC_EN bit is set to 1. If the MC_EN bit is 0, access is invalid
(writing is invalid; the read value is indefinite).
The following shows the setting contents assumed according to the writing order: