Renesas SH7781 User Manual

Page 1075

21. Serial Communication Interface with FIFO (SCIF)

Rev.1.00 Jan. 10, 2008 Page 1045 of 1658

REJ09B0261-0100

Ch. Register

Name

Abbrev.

Power-on Reset

PRESET Pin/

WDT/H-UDI

Manual Reset

by WDT/Multiple

Exception

Sleep/Deep

Sleep

by SLEEP

Instruction

Module

Standby

Serial mode register 4

SCSMR4

H'0000

Retained

Bit

rate

SCBRR4

H'FF

Retained Retained

Serial control register 4

SCSCR4

H'0000

Retained

Transmit FIFO data register 4

SCFTDR4 Undefined

Undefined

Retained

Serial status register 4

SCFSR4

H'0060

Retained

Receive FIFO data register 4

SCFRDR4 Undefined

Undefined

Retained

FIFO control register 4

SCFCR4

H'0000

Retained

Transmit FIFO data count register 4 SCTFDR4 H'0000

H'0000

Retained

Receive FIFO data count register 4 SCRFDR4 H'0000

H'0000

Retained

Serial port register 4

SCSPTR4 H'0000*

H'0000*

Retained

Line status register 4

SCLSR4

H'0000

Retained

Serial mode register 5

SCSMR5

H'0000

Retained

Bit

rate

SCBRR5

H'FF

Retained Retained

Serial control register 5

SCSCR5

H'0000

Retained

Transmit FIFO data register 5

SCFTDR5 Undefined

Undefined

Retained

Serial status register 5

SCFSR5

H'0060

Retained

Receive FIFO data register 5

SCFRDR5 Undefined

Undefined

Retained

FIFO control register 5

SCFCR5

H'0000

Retained

Transmit FIFO data count register 5 SCTFDR5 H'0000

H'0000

Retained

Receive FIFO data count register 5 SCRFDR5 H'0000

H'0000

Retained

Serial port register 5

SCSPTR5 H'0000*

H'0000*

Retained

Line status register 5

SCLSR5

H'0000

Retained

Serial error register 5

SCRER5

H'0000

Retained

Notes: 1. Only 0 can be written to bits 7 to 4, 1, and 0 to clear the flags.

2. Only 0 can be written to bit 0 to clear the flags.

3. Bits 2 and 0 are undefined.

4. Bits 6, 4, 2, and 0 are undefined.