Renesas SH7781 - Manual (Page 527)

12. DDR2-SDRAM Interface (DBSC2)
Rev.1.00 Jan. 10, 2008 Page 497 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
Value R/W
Description
11 to 8 RDWR3 to
RDWR0 0011 R/W READ-WRITE Command Minimum Interval Setting Bits
These bits set the READ-WRITE command minimum
interval constraint. These bits should be set according
to the SDRAM specifications. The number of cycles is
the number of DDR clock cycles.
0000: Setting prohibit (If specified, correct operation
cannot be guaranteed.)
:
0010: Setting prohibit (If specified, correct operation
cannot be guaranteed.)
0011: 4 cycles
0100: 5 cycles
:
1000: 9 cycles
1001: Setting prohibit (If specified, correct operation
cannot be guaranteed.)
:
1111: Setting prohibit (If specified, correct operation
cannot be guaranteed.)
7 to 4
⎯
All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
Operation when a value other than 0 is written is not
guaranteed.