Renesas SH7781 User Manual

Page 35

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1. Overview

Rev.1.00 Jan. 10, 2008 Page 5 of 1658

REJ09B0261-0100

Item Features

URAM

• 128-Kbyte large-capacity memory
• Three independent read/write ports
• 8-/16-/32-bit access by the CPU or the FPU
• 8-/16-/32-bit access by the DMAC

Interrupt controller
(INTC)

• Nine independent external interrupts: NMI and IRQ7 to IRQ0

⎯ NMI: Falling/rising edge selectable
⎯ IRQ: Falling/rising edge or high level/low level selectable

• 15-level-encoded external interrupts: IRL3 to IRL0, or IRL7 to IRL4
• On-chip module interrupts: A priority level can be set for each module.

The following modules can issue on-chip module interrupts:

TMU, DU, GDTA, SCIF, WDT, H-UDI, DMAC, HAC, PCIC, SIOF, HSPI,

MMCIF, SSI, FLCTL, and GPIO.