Renesas SH7781 - Manual (Page 778)

15. Clock Pulse Generator (CPG)
Rev.1.00 Jan. 10, 2008 Page 748 of 1658
REJ09B0261-0100
15.5 Calculating the Frequency
Table 15.7 shows the relationship between the division ratio of divider 2 described for frequency
control register FRQCR1 and frequency display register FRQMR1, and the EXTAL input.
Table 15.7 Relationship Between the Division Ratio of Divider 2 and the Frequency
Frequency (for an input clock)
Division ratio of
divider 2
Clock operating mode 0 to 3 Clock operating mode 16 to 19
Ч 1/2 Ч 36 Ч 18
Ч 1/4 Ч 18 Ч 9
Ч 1/6 Ч 12 Ч 6
Ч 1/8 Ч 9 Ч 9/2
Ч 1/12 Ч 6 Ч 3
Ч 1/16 Ч 9/2 Ч 9/4
Ч 1/18 Ч 4 Ч 2
Ч 1/24 Ч 3 Ч 3/2
Ч 1/32 Ч 9/4 Ч 9/8
Ч 1/36 Ч 2 Ч 1
Ч 1/48 Ч 3/2 Ч 3/4