Renesas SH7781 - Manual (Page 616)

13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 586 of 1658
REJ09B0261-0100
(26) PCI Power Management Control/Status Register (PCIPMCSR)
This register manages power management events (PME) of the PCI function. For details, see
section 3, PCI Power Management Interface in PCI Bus Power Management Interface
Specification Revision 1.1.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14
PS ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ PME
EN
DSL DSC PMES
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W R/W R R R R R R R R R R R R R R
Bit:
Initial value:
SH R/W:
R/W R/W R R R R R R R R R R R R R R PCI R/W:
Bit Bit Name
Initial
Value R/W
Description
15 PMES 0 SH: R
PCI: R
PME Status
Indicates the state of the
PME signal (not supported)
Note: The PCIC in this LSI dose not has the
PME
pin.
14, 13 DSC 00 SH: R
PCI: R
Data Scale
These bits specify the scaling value of data field (not
supported)
12 to 9 DSL 0000 SH: R
PCI: R
Data Select
These bits specify the value output to the data field
(not supported)
8 PMEEN 0 SH: R
PCI: R
PME Enable
Controls the
PME output (not supported)
Note: The PCIC in this LSI dose not has the
PME
pin.
7 to 2
⎯
All 0 SH: R
PCI: R
Reserved
These bits are always read as 0. The write value
should always be 0.