Renesas SH7781 - Manual (Page 1412)

28. General Purpose I/O Ports (GPIO)
Rev.1.00 Jan. 10, 2008 Page 1382 of 1658
REJ09B0261-0100
28.2 Register Descriptions
The following registers are provided to control the GPIO ports.
Table 28.2 Register Configuration (1)
Register Name Abbrev. R/W P4 Address * 1
Area 7
Address
* 1
Access
Size
* 2
Sync
Clock
Port A control register PACR R/W H'FFE7 0000 H'1FE7 0000 16 Pck
Port B control register PBCR R/W H'FFE7 0002 H'1FE7 0002 16 Pck
Port C control register PCCR R/W H'FFE7 0004 H'1FE7 0004 16 Pck
Port D control register PDCR R/W H'FFE7 0006 H'1FE7 0006 16 Pck
Port E control register PECR R/W H'FFE7 0008 H'1FE7 0008 16 Pck
Port F control register PFCR R/W H'FFE7 000A H'1FE7 000A 16 Pck
Port G control register PGCR R/W H'FFE7 000C H'1FE7 000C 16 Pck
Port H control register PHCR R/W H'FFE7 000E H'1FE7 000E 16 Pck
Port J control register PJCR R/W H'FFE7 0010 H'1FE7 0010 16 Pck
Port K control register PKCR R/W H'FFE7 0012 H'1FE7 0012 16 Pck
Port L control register PLCR R/W H'FFE7 0014 H'1FE7 0014 16 Pck
Port M control register PMCR R/W H'FFE7 0016 H'1FE7 0016 16 Pck
Port N control register PNCR R/W H'FFE7 0018 H'1FE7 0018 16 Pck
Port P control register PPCR R/W H'FFE7 001A H'1FE7 001A 16 Pck
Port Q control register PQCR R/W H'FFE7 001C H'1FE7 001C 16 Pck
Port R control register PRCR R/W H'FFE7 001E H'1FE7 001E 16 Pck
Port A data register PADR R/W H'FFE7 0020 H'1FE7 0020 8 Pck
Port B data register PBDR R/W H'FFE7 0022 H'1FE7 0022 8 Pck
Port C data register PCDR R/W H'FFE7 0024 H'1FE7 0024 8 Pck
Port D data register PDDR R/W H'FFE7 0026 H'1FE7 0026 8 Pck
Port E data register PEDR R/W H'FFE7 0028 H'1FE7 0028 8 Pck
Port F data register PFDR R/W H'FFE7 002A H'1FE7 002A 8 Pck
Port G data register PGDR R/W H'FFE7 002C H'1FE7 002C 8 Pck
Port H data register PHDR R/W H'FFE7 002E H'1FE7 002E 8 Pck
Port J data register PJDR R/W H'FFE7 0030 H'1FE7 0030 8 Pck