Renesas SH7781 - Manual (Page 334)

10. Interrupt Controller (INTC)
Rev.1.00 Jan. 10, 2008 Page 304 of 1658
REJ09B0261-0100
Bit
Initial
Value R/W
Source Function Description
5 Undefined R SCIF
channel 3 SCIF channel 3 interrupt
source indication
4 Undefined R SCIF
channel 2 SCIF channel 2 interrupt
source indication
3 Undefined R SCIF
channel 1 SCIF channel 1 interrupt
source indication
2 Undefined R SCIF
channel 0 SCIF channel 0 interrupt
source indication
1 Undefined R TMU
channels 3
to 5 TMU channel 3 to 5
interrupt source indication
0 Undefined R TMU
channels 0
to 2 TMU channel 0 to 2
interrupt source indication
These bits indicate the
interrupt source of each
peripheral module that is
generating an interrupt.
(INT2A0 is not affected by the
setting of the interrupt mask
register).
0: No interrupt
1: An interrupt has occurred
Note: Interrupt sources can
also be identified by
directly reading the
INTEVT code. In this
case, reading from this
register is not required.
If the interrupt source in an individual module is set or cleared, the time required until the state is
reflected in INT2A0 is as shown in table 10.7.