Renesas SH7781 - Manual (Page 570)

12. DDR2-SDRAM Interface (DBSC2)
Rev.1.00 Jan. 10, 2008 Page 540 of 1658
REJ09B0261-0100
MCK0,
MCK1
MA[14:11]
MA[9:0]
MBA[2:0]
MCKE
MCS
MRAS
MCAS
MWE
MA[10]
ACT
bank A
READ
bank A
Invalid
Invalid
Invalid
Invalid
MDQS[3:0]
MDQ[31:0]
MDM[3:0] Invalid
Invalid Invalid
Invalid
PALL
Invalid
Invalid
REF SDRAM
command
tRAS
= 9 cycles
Read data
tRC
= 12 cycles
tRP
= 3 cycles
Example of CL = 3
Valid
Valid
Valid
Valid
Valid
Valid
High level
Figure 12.17 tRC
Figure 12.17 shows an example of performing auto-refresh after read access of bank A, the page
for which had been closed. After issuing an ACT command and READ command for bank A and
performing data reading, a PALL command must be used to close all banks in order to perform
auto-refresh. In order to issue the PALL command, the tRAS time constraint must be satisfied, and
issuing of the PALL command is delayed until this time. Then, when issuing the REF command,
both of time constraints tRP and tRC must be satisfied simultaneously. When these constraints are
both satisfied, the REF command is issued and auto-refresh is performed.