Renesas SH7781 - Manual (Page 1371)

27. NAND Flash Memory Controller (FLCTL)
Rev.1.00 Jan. 10, 2008 Page 1341 of 1658
REJ09B0261-0100
Corresponding
Flash Memory
Pin
Pin Name Function I/O NAND Type Description
FR/
B Ready/busy
Input R/
B Ready/Busy
Indicates ready state at high level.
Indicates busy state at low level.
Multiplexed with SCIF0_RXD/HSPI_RX.
—* — —
WP Write
Protect/Reset
Prevents accidental erasure or
programming when power is turned on or
off, at low level.
FSE Spare
area
enable
Output
SE
Spare Area Enable
Enables access to spare area. This pin
must be fixed low in sector access mode.
Multiplexed with
SCIF0_RTS/HSPI_CS.
Note:
∗ Not supported by this LSI.