Renesas SH7781 - Manual (Page 1139)

22. Serial I/O with FIFO (SIOF)
Rev.1.00 Jan. 10, 2008 Page 1109 of 1658
REJ09B0261-0100
22.3.4 Receive Data Register (SIRDR)
SIRDR is a 32-bit read-only register that reads receive data of the SIOF. SIRDR stores data in the
receive FIFO.
16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30
— — — — — — — — — — — — — — — —
SIRDL[15:0]
R R R R R R R R R R R R R R R R
R R R R R R R R R R R R R R R R
BIt:
Initial value:
R/W:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14
— — — — — — — — — — — — — — — —
SIRDR[15:0]
BIt:
Initial value:
R/W:
Bit Bit Name
Initial
Value R/W
Description
31 to 16 SIRDL[15:0] Undefined R Left-Channel Receive Data
These bits store data received from the SIOF_RXD pin
as left-channel data. The position of the left-channel
data in the receive frame depends on the value set in
the RDLA bit in SIRDAR.
• These bits are valid when the RDLE bit in SIRDAR
is set to 1.
15 to 0 SIRDR[15:0] Undefined R Right-Channel Receive Data
These bits store data received from the SIOF_RXD pin
as right-channel data. The position of the right-channel
data in the receive frame depends on the value set in
the RDRA bit in SIRDAR.
• These bits are valid when the RDRE bit in SIRDAR
is set to 1.