Renesas SH7781 - Manual (Page 1089)

21. Serial Communication Interface with FIFO (SCIF)
Rev.1.00 Jan. 10, 2008 Page 1059 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
Value R/W
Description
1 RDF 0 R/W* 1 Receive FIFO Data Full
Indicates that the received data has been transferred
from SCRSR to SCFRDR, and the number of receive
data bytes in SCFRDR is equal to or greater than the
receive trigger count set by the RTRG1 and RTRG0
bits in SCFCR.
0: The number of receive data bytes in SCFRDR is less
than the receive trigger setting count.
[Clearing conditions]
• Power-on reset or manual reset
• When SCFRDR is read until the number of receive
data bytes in SCFRDR falls below the receive
trigger setting count after reading RDF = 1, and 0 is
written to RDF
• When SCFRDR is read by the DMAC until the
number of receive data bytes in SCFRDR falls
below the receive trigger setting count
1: The number of receive data bytes in SCFRDR is
equal to or greater than the receive trigger setting
count
[Setting condition]
• When SCFRDR contains at least the receive trigger
setting count of receive data bytes* 5