Renesas SH7781 - Manual (Page 887)

19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 857 of 1658
REJ09B0261-0100
19.3.6 Color Palette Control Register (CPCR)
The color palette control register (CPCR) is a register which enables switching of the color palette.
For information on color palette switching, refer to section 19.4.8, Color Palettes.
R/W:
Internal update:
R/W:
Internal update:
16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30 Bit:
Initial value:
R/W R/W R/W R/W R R R R R R R R R R R R
O O O O
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CP1CE CP2CE CP3CE CP4CE — — — — — — — — — — — —
R R R R R R R R R R R R R R R R
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
— — — — — — — — — — — — — — — —
0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14 Bit:
Initial value:
Bit Bit Name
Initial
Value R/W Internal
Update Description
31 to 20
⎯ All
0 R
⎯ Reserved
These bits are always read as 0. The write value
should always be 0.
19 CP4CE 0 R/W Yes Color Palette 4 Change Enable
0: Switching of color palette 4 is not performed.
1: Switching of color palette 4 is performed.
Switching is performed when the DRES bit in
DSYSR is changed from 1 to 0, or with the
timing of an internal update. This bit can only
be set to 1; an operation to set the bit to 0 is
invalid. After switching of the color palette 4,
the bit is cleared to 0.
When setting to 1 and clearing occur
simultaneously, clearing to 0 takes priority.