Renesas SH7781 - Manual (Page 469)

11. Local Bus State Controller (LBSC)
Rev.1.00 Jan. 10, 2008 Page 439 of 1658
REJ09B0261-0100
Tm1
CLKOUT
A
RD/FRAME
CSn
R/ W
D31 to D0
BS
Tmd1 Tmd2 Tmd3 Tmd4 Tmd5 Tmd6 Tmd7 Tmd8
RDY
DACKn
D1 D2 D3 D4 D5 D6 D7 D8
In this example, DACKn is active-high.
Figure 11.34 MPX Interface Timing 11 (Burst Write Cycle, IW
= 0000,
No External Wait, 32-Bit Bus Width, 32-Byte Data Transfer)