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Renesas SH7781 User Manual

Page 1612

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32. Electrical Characteristics

Rev.1.00 Jan. 10, 2008 Page 1582 of 1658
REJ09B0261-0100

D31 to D0
(Read)

(SA: IO

← memory)

Legend:
IO: DACK

device

SA:

Single-address DMA transfer

DA:

Dual-address DMA transfer

Note: DACK is configured as active-high.

A25 to A5

A4 to A0

Tw

T1

Twe

TB2

TB1

Twb

Twbe

TB1

TB2

Twb

Twbe

Twb

T2

TB2

Twbe

TB1

t

AD

t

AD

t

AD

t

RDH

t

RDS

t

RDH

t

RDS

t

DACD

t

DACD

t

DACD

t

BSD

t

BSD

t

BSD

t

BSD

t

RSD

t

RSD

t

RWD

t

CSD

t

RWD

t

CSD

t

DACD

t

DACD

t

RSD

t

RDYH

t

RDYS

t

RDYH

t

RDYS

t

RDYH

t

RDYS

t

RDYH

t

RDYS

CLKOUT

DACKn
(DA)

DACKn

CSn

RD/

WR

RD

BS

RDY

Figure 32.16 Burst ROM Bus Cycle (One Internal Wait Cycle + One External Wait Cycle)