Renesas SH7781 - Manual (Page 1298)

25. Audio Codec Interface (HAC)
Rev.1.00 Jan. 10, 2008 Page 1268 of 1658
REJ09B0261-0100
Channel Register Name Abbrev.
Power-on
Reset by
PRESET
Pin/WDT/
H-UDI Manual
Reset by
WDT/
Multiple
Exceptions
Sleep by
Sleep
Instruction
Module
Standby Deep
Sleep
1 Control and status
register 1
HACCR1 H'0000 0200 H'0000 0200 Retained Retained Retained
1 Command/status
address register 1
HACCSAR1 H'0000 0000 H'0000 0000 Retained Retained Retained
1 Command/status
data register 1
HACCSDR1 H'0000 0000 H'0000 0000 Retained Retained Retained
1 PCM left channel
register 1 HACPCML1 H'0000 0000 H'0000 0000 Retained Retained Retained
1 PCM right channel
register 1 HACPCMR1 H'0000 0000 H'0000 0000 Retained Retained Retained
1 TX interrupt enable
register 1 HACTIER1 H'0000 0000 H'0000 0000 Retained Retained Retained
1 TX status register
1
HACTSR1 H'F000 0000 H'F000 0000 Retained Retained Retained
1 RX interrupt
enable register 1
HACRIER1 H'0000 0000 H'0000 0000 Retained Retained Retained
1 RX status register
1 HACRSR1 H'0000 0000 H'0000 0000 Retained Retained Retained
1 HAC control
register 1
HACACR1 H'8400 0000 H'8400 0000 Retained Retained Retained