Renesas SH7781 - Manual (Page 1098)

21. Serial Communication Interface with FIFO (SCIF)
Rev.1.00 Jan. 10, 2008 Page 1068 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
Value R/W
Description
2 SCKDT — R/W Serial Port Clock Port Data
Specifies the serial port SCIF_SCK pin input/output
data. Input or output is specified by the SCKIO bit. In
output mode, the SCKDT bit value is output to the
SCIF_SCK pin. The SCIF_SCK pin value is read from
the SCKDT bit regardless of the value of the SCKIO bit.
The initial value of this bit after a power-on reset or
manual reset is undefined.
0: Input/output data is low-level
1: Input/output data is high-level
1 SPB2IO 0 R/W Serial Port Break Input/Output
This bit specifies serial port SCIF_TXD pin output
condition. When actually setting the SCIF_TXD pin as a
port output pin to output the value set by the SPB2DT
bit, the TE bit in SCSCR should be cleared to 0.
0: SPB2DT bit value is not output to the SCIF_TXD pin
1: SPB2DT bit value is output to the SCIF_TXD pin
0 SPB2DT — R/W Serial Port Break Data
Specifies the serial port SCIF_RXD pin input data and
SCIF_TXD pin output data. The SCIF_TXD pin output
condition is specified by the SPB2IO bit. When the
SCIF_TXD pin is designated as an output, the value of
the SPB2DT bit is output to the SCIF_TXD pin. The
SCIF_RXD pin value is read from the SPB2DT bit
regardless of the value of the SPB2IO bit. The initial
value of this bit after a power-on reset or manual reset
is undefined.
0: Input/output data is low-level
1: Input/output data is high-level
Note: * Only channel 0. Reserved bit in channels 1 to 5.