Renesas SH7781 - Manual (Page 1686)

Appendix
Rev.1.00 Jan. 10, 2008 Page 1656 of 1658
REJ09B0261-0100
E. Version Registers (PVR, PRR)
The SH7785 has the read-only registers which show the version of a processor core, and the
version of a product. By using the value of these registers, it becomes possible to be able to
distinguish the version and product of a processor from software, and to realize the scalability of
the high system. Since the values of the version registers differ for every product, please refer to
the hardware manual or contact Renesas Technology Corp.
Note: The bit 7 to bit 0 of PVR register and the bit 3 to bit 0 of PRR register should be masked
by the software.
Table E.1 Register Configuration
Register Name Abbrev. R/W
Initial
Value P4
Address Area 7
Address Access
Size
Processor Version Register PVR R H'1030 07xx H'FF00 0030 H'1F00 0030 32
Product Register PRR R H'0000 02xx H'FF00 0044 H'1F00 0044 32
Legend:
x: Undefined
• Processor Version Register (PVR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Bit:
version information
version information
0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 Initial value
R R R R R R R R R R R R R R R R R/W:
Bit:
Initial value
R/W:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 1 1 1
R R R R R R R R
• Product Register (PRR)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Bit:
version information
version information
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Initial value
R R R R R R R R R R R R R R R R R/W:
Bit:
Initial value
R/W:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 1 0
R R R R R R R R