Renesas SH7781 - Manual (Page 1484)

29. User Break Controller (UBC)
Rev.1.00 Jan. 10, 2008 Page 1454 of 1658
REJ09B0261-0100
Figure 29.1 shows the UBC block diagram.
SAB
Internal bus
Access
comparator
Address
comparator
Channel 0
operation
control
Channel 1
operation
control
Access
comparator
Address
comparator
Data
comparator
Control
CBR0
CAR0
CAMR0
CRR0
CBR1
CAR1
CAMR1
CDR1
CDMR1
CETR1
CRR1
CCMFR
CBCR
User break is requested.
SDB
Access
control
CBR0:
CRR0:
CAR0:
CAMR0:
CBR1:
CRR1:
CAR1:
CAMR1:
CDR1:
CDMR1:
CETR1:
CCMFR:
CBCR:
SAB:
SDB:
Legend:
ASID
comparator
ASID
comparator
ASID
Match condition setting register 0
Match operation setting register 0
Match address setting register 0
Match address mask setting register 0
Match condition setting register 1
Match operation setting register 1
Match address setting register 1
Match address mask setting register 1
Match data setting register 1
Match data mask setting register 1
Execution count break register
Channel match flag register
Break control register
Operand address bus
Operand data bus
Figure 29.1 Block Diagram of UBC