Renesas SH7781 - Manual (Page 333)

10. Interrupt Controller (INTC)
Rev.1.00 Jan. 10, 2008 Page 303 of 1658
REJ09B0261-0100
Bit
Initial
Value R/W
Source Function Description
21 Undefined R HSPI HSPI interrupt source
indication
20 Undefined R SIOF SIOF interrupt source
indication
19 Undefined R PCIC (5) PCIERR and PCIPWD3 to
PCIPWD0 interrupt source
indication
18 Undefined R PCIC (4) PCIINTD interrupt source
indication
17 Undefined R PCIC (3) PCIINTC interrupt source
indication
16 Undefined R PCIC (2) PCIINTB interrupt source
indication
15 Undefined R PCIC (1) PCIINTA interrupt source
indication
These bits indicate the
interrupt source of each
peripheral module that is
generating an interrupt.
(INT2A0 is not affected by the
setting of the interrupt mask
register).
0: No interrupt
1: An interrupt has occurred
Note: Interrupt sources can
also be identified by
directly reading the
INTEVT code. In this
case, reading from this
register is not required.
14 Undefined R PCIC (0) PCISERR interrupt source
indication
13 Undefined R HAC
channel 1
HAC channel 1 interrupt
source indication
12 Undefined R HAC
channel 0
HAC channel 0 interrupt
source indication
11 Undefined R DMAC (1) DMAC channels 6 to 11
and address error interrupt
source indication
10 Undefined R DMAC (0) DMAC channels 0 to 5 and
address error interrupt
source indication
9 Undefined R H-UDI H-UDI interrupt source
indication
8 Undefined R WDT WDT interrupt source
indication
7 Undefined R SCIF
channel 5 SCIF channel 5 interrupt
source indication
6 Undefined R SCIF
channel 4 SCIF channel 4 interrupt
source indication