Renesas SH7781 - Manual (Page 1233)

24. Multimedia Card Interface (MMCIF)
Rev.1.00 Jan. 10, 2008 Page 1203 of 1658
REJ09B0261-0100
24.3.14 Response Registers 0 to 16, D (RSPR0 to RSPR16, RSPRD)
RSPR0 to RSPR16 are command response registers, which are seventeen 8-bit registers. RSPRD
is an 8-bit CRC status register.
The number of command response bytes differs according to the command. The number of
command response bytes can be specified by RSPTYR in the MMCIF. The command response is
shifted-in from bit 0 in RSPR16, and shifted to the number of command response bytes
× 8 bits.
Table 24.6 summarizes the correspondence between the number of command response bytes and
valid RSPR register.
Table 24.6 Correspondence between Command Response Byte Number and RSPR
MMC Mode Response
RSPR registers 6 bytes (R1, R1b, R3, R4, R5) 17 bytes (R2)
RSPR0
⎯ 1st
byte
RSPR1
⎯ 2nd
byte
RSPR2
⎯ 3rd
byte
RSPR3
⎯ 4th
byte
RSPR4
⎯ 5th
byte
RSPR5
⎯ 6th
byte
RSPR6
⎯ 7th
byte
RSPR7
⎯ 8th
byte
RSPR8
⎯ 9th
byte
RSPR9
⎯ 10th
byte
RSPR10
⎯ 11th
byte
RSPR11 1st byte 12th byte
RSPR12 2nd byte 13th byte
RSPR13 3rd byte 14th byte
RSPR14 4th byte 15th byte
RSPR15 5th byte 16th byte
RSPR16 6th byte 17th byte
RSPR0 to RSPR16 are simple shift registers. A command response that has been shifted in is not
automatically cleared, and it is continuously shifted until it is shifted out from bit 7 in RSPR0. To
clear unnecessary bytes to H'00, write an arbitrary value to each RSPR.