Renesas SH7781 - Manual (Page 1074)

21. Serial Communication Interface with FIFO (SCIF)
Rev.1.00 Jan. 10, 2008 Page 1044 of 1658
REJ09B0261-0100
Ch. Register Name Abbrev.
Power-on Reset
by PRESET Pin/
WDT/H-UDI
Manual Reset
by WDT/Multiple
Exception
Sleep/Deep
Sleep
by SLEEP
Instruction
Module
Standby
2 Serial mode register 2 SCSMR2 H'0000 H'0000 Retained Retained
Bit rate register 2 SCBRR2 H'FF H'FF Retained Retained
Serial control register 2 SCSCR2 H'0000 H'0000 Retained Retained
Transmit FIFO data register 2 SCFTDR2 Undefined Undefined Retained Retained
Serial status register 2 SCFSR2 H'0060 H'0060 Retained Retained
Receive FIFO data register 2 SCFRDR2 Undefined Undefined Retained Retained
FIFO control register 2 SCFCR2 H'0000 H'0000 Retained Retained
Transmit FIFO data count register 2 SCTFDR2 H'0000 H'0000 Retained Retained
Receive FIFO data count register 2 SCRFDR2 H'0000 H'0000 Retained Retained
Serial port register 2 SCSPTR2 H'0000* 4 H'0000* 4 Retained Retained
Line status register 2 SCLSR2 H'0000 H'0000 Retained Retained
Serial error register 2 SCRER2 H'0000 H'0000 Retained Retained
3 Serial mode register 3 SCSMR3 H'0000 H'0000 Retained Retained
Bit rate register 3 SCBRR3 H'FF H'FF Retained Retained
Serial control register 3 SCSCR3 H'0000 H'0000 Retained Retained
Transmit FIFO data register 3 SCFTDR3 Undefined Undefined Retained Retained
Serial status register 3 SCFSR3 H'0060 H'0060 Retained Retained
Receive FIFO data register 3 SCFRDR3 Undefined Undefined Retained Retained
FIFO control register 3 SCFCR3 H'0000 H'0000 Retained Retained
Transmit FIFO data count register 3 SCTFDR3 H'0000 H'0000 Retained Retained
Receive FIFO data count register 3 SCRFDR3 H'0000 H'0000 Retained Retained
Serial port register 3 SCSPTR3 H'0000* 4 H'0000* 4 Retained Retained
Line status register 3 SCLSR3 H'0000 H'0000 Retained Retained
Serial error register 3 SCRER3 H'0000 H'0000 Retained Retained