Altera Transceiver PHY IP Core User Manual
Page 689
Date
Document
Version
Changes Made
June 2012
1.7
• Added the following QSF settings to all transceiver PHY:
XCVR_
TX_PRE_EMP_PRE_TAP_USER
,
XCVR_TX_PRE_EMP_2ND_POST_TAP_
USER
, and 11 new settings for GT transceivers.
• Changed the default value for
XCVR_REFCLK_PIN_TERMINATION
from DC_coupling_internal_100_Ohm to AC_coupling.
• Added arrows indicating Transceiver Reconfiguration
Controller IP Core connection to block diagram.
• Changed the maximum frequency of
phy_mgmt_clk
to 150
MHz if the same clock is used for the Transceiver Reconfigura‐
tion Controller IP Core.
• Added the following restriction in the dynamic reconfiguration
section: three channels share an Avalon-MM slave interface
which must connect to the same Transceiver Reconfiguration
Controller IP Core.
Deterministic Latency PHY IP Core
June 2012
1.7
• Added the following QSF settings to all transceiver PHY:
XCVR_
TX_PRE_EMP_PRE_TAP_USER
,
XCVR_TX_PRE_EMP_2ND_POST_TAP_
USER
, and 11 new settings for GT transceivers.
• Added PLL reconfiguration option.
• Changed the default value for
XCVR_REFCLK_PIN_TERMINATION
from DC_coupling_internal_100_Ohm to AC_coupling.
• Removed references to the byte serializer and deserializer which
is not included in the datapath.
• Added GUI option for
tx_clkout
feedback path for TX PLL to
align the TX and RX clock domains and figure illustrating this
approach.
• Added tables showing the signals in TX and RX parallel data that
correspond to data, control, and status signals with and without
8B/10B encoding.
• Corrected definition of
rx_runnindisp
. This is a status output.
• Added the following restriction in the dynamic reconfiguration
section: three channels share an Avalon-MM slave interface
which must connect to the same Transceiver Reconfiguration
Controller IP Core.
Stratix V Transceiver Native PHY
June 2012
1.7
• Initial release.
Arria V Transceiver Native PHY
June 2012
1.7
• Initial release.
Transceiver PHY Reconfiguration Controller
UG-01080
2015.01.19
Revision History for Previous Releases of the Transceiver PHY IP Core
21-29
Additional Information for the Transceiver PHY IP Core
Altera Corporation