Altera Transceiver PHY IP Core - Manual (Page 63)

10GBASE-KR Auto-Negotiation and Link Training Parameters
Table 4-5: Auto Negotiation and Link Training Settings
Name Range Description
AN_PAUSE Pause Ability 0-8 Depends upon MAC. Local device pause capability
C2:0 = D12:10 of AN word.
C2 = reserved.
C1 is the same as ASM_DIR.
C0 is the same as PAUSE.
CAPABLE_FEC ENABLE_FEC
(request)
0-3 Depends upon FEC. Local device FEC abiity F1:0 =
D47:46.
F0 is Capability.
F1 is Requested.
AN_TECH Technology Ability 0-63 Depends upon options. Local Device Tech ability
T5:0 = D26:21 Other bits:
• T24:6 = 0
• T0 = Gige
• T1 = XAUI
• T2 = 10G
• T3 = 40G
• T4 = CR-4
• T5 = 100G
AN_SELECTOR Selector Field 0-31 IEEE selector S4:0 = D4:0 of AN word
Width of the Training Wait
Counter
7-8 IEEE 802.3 clause 72.6.10.3.2
wait_timer_done
should be between 100 and 300 frames. 7 gives 127
frames. 8 gives 255 frames.
10GBASE-R Parameters
The 10GBASE-R parameters specify basic features of the 10GBASE-R PCS. The FEC options allow you to
specify the FEC ability.
Table 4-6: 10GBASE-R Parameters
Parameter Name Options Description
Enable IEEE 1588 Precision Time
Protocol
On/Off When you turn this option On, the core includes
logic to implement the IEEE 1588 Precision
Time Protocol.
UG-01080
2015.01.19
10GBASE-KR Auto-Negotiation and Link Training Parameters 4-7
Backplane Ethernet 10GBASE-KR PHY IP Core with Early Access FEC Option Altera Corporation
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